Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip



de

Éditeur :

Springer


Paru le : 2017-07-06



eBook Téléchargement , DRM LCP 🛈 DRM Adobe 🛈
Lecture en ligne (streaming)
94,94

Téléchargement immédiat
Dès validation de votre commande
Ajouter à ma liste d'envies
Image Louise Reader présentation

Louise Reader

Lisez ce titre sur l'application Louise Reader.

Description

This book pioneers the field of gain-cell embedded DRAM (GC-eDRAM) design for low-power VLSI systems-on-chip (SoCs). Novel GC-eDRAMs are specifically designed and optimized for a range of low-power VLSI SoCs, ranging from ultra-low power to power-aware high-performance applications. After a detailed review of prior-art GC-eDRAMs, an analytical retention time distribution model is introduced and validated by silicon measurements, which is key for low-power GC-eDRAM design. The book then investigates supply voltage scaling and near-threshold voltage (NTV) operation of a conventional gain cell (GC), before presenting novel GC circuit and assist techniques for NTV operation, including a 3-transistor full transmission-gate write port, reverse body biasing (RBB), and a replica technique for optimum refresh timing. Next, conventional GC bitcells are evaluated under aggressive technology and voltage scaling (down to the subthreshold domain), before novel bitcells for aggressively scaled CMOS nodes and soft-error tolerance as presented, including a 4-transistor GC with partial internal feedback and a 4-transistor GC with built-in redundancy.
Pages
146 pages
Collection
n.c
Parution
2017-07-06
Marque
Springer
EAN papier
9783319604015
EAN PDF
9783319604022

Informations sur l'ebook
Nombre pages copiables
1
Nombre pages imprimables
14
Taille du fichier
5929 Ko
Prix
94,94 €
EAN EPUB
9783319604022

Informations sur l'ebook
Nombre pages copiables
1
Nombre pages imprimables
14
Taille du fichier
3983 Ko
Prix
94,94 €

Suggestions personnalisées