Computation Platforms for Multi-access Edge Computing



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Springer


Paru le : 2025-11-19



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Description

This book aims to clarify how to build the computational infrastructure for multi-access edge computing (MEC) from the perspectives of applications, system software, architecture, CAD, and devices. MEC enables the execution of processing tasks that are challenging for IoT devices without having to rely on the cloud, by equipping 5G/6G base stations with computational resources. 
Following the introduction, Chapter 2 describes the multi-FPGA system that was developed for this project with various techniques to build FPGA clusters. Chapter 3 discusses the middleware for MEC and applications such as social implementation in nursing care facilities. Chapter 4 focuses on the roles of MEC, such as anonymization, data collection, and selection, and describes the technologies for utilizing MEC in the construction of smart cities. Chapter 5 discusses the realization of Robot Audition, one of the most promising applications expected to run on MEC. It introduces an attempt to implement HARK, a widely used platform, on MEC. Chapter 6 presents a new FPGA device, SLMLET, which is more cost-effective and power-efficient than conventional FPGAs and features communication links for multi-node systems. It is an ambitious chip equipped with variable-structure IP, differing from traditional FPGAs.
The readers will gain an understanding of MEC and related topics, as well as insight into its future potential. This knowledge is essential for engineers involved in cloud and edge computing, as well as those interested in FPGA and CAD technologies. 
Pages
153 pages
Collection
n.c
Parution
2025-11-19
Marque
Springer
EAN papier
9789819689347
EAN PDF
9789819689354

Informations sur l'ebook
Nombre pages copiables
1
Nombre pages imprimables
15
Taille du fichier
13947 Ko
Prix
158,99 €
EAN EPUB
9789819689354

Informations sur l'ebook
Nombre pages copiables
1
Nombre pages imprimables
15
Taille du fichier
25426 Ko
Prix
158,99 €

Hideharu Amano received a Ph.D. in electric engineering from Keio University, Japan, in 1986. He is currently a Senior Fellow in the Systems Design Lab (d.lab) at the University of Tokyo, and Professor Emeritus at Keio University. His research interests include parallel architecture and reconfigurable computing.

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