Téléchargez le livre : Digital VLSI Design with Verilog

Digital VLSI Design with Verilog

A Textbook from Silicon Valley Polytechnic Institute

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Éditeur :

Springer


Paru le : 2014-06-17



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Description
This book is structured as a step-by-step course of study along the lines of a VLSI integrated circuit design project. The entire Verilog language is presented, from the basics to everything necessary for synthesis of an entire 70,000 transistor, full-duplex serializer-deserializer, including synthesizable PLLs. The author includes everything an engineer needs for in-depth understanding of the Verilog language: Syntax, synthesis semantics, simulation and test. Complete solutions for the 27 labs are provided in the downloadable files that accompany the book. For readers with access to appropriate electronic design tools, all solutions can be developed, simulated, and synthesized as described in the book. A partial list of design topics includes design partitioning, hierarchy decomposition, safe coding styles, back annotation, wrapper modules, concurrency, race conditions, assertion-based verification, clock synchronization, and design for test. A concluding presentation of special topics includes System Verilog and Verilog-AMS.
Pages
553 pages
Collection
n.c
Parution
2014-06-17
Marque
Springer
EAN papier
9783319047881
EAN EPUB
9783319047898
Informations sur l'ebook
Nombre pages copiables
5
Nombre pages imprimables
55
Taille du fichier
9492 Ko
Ce livre est accessible aux handicaps Voir les informations sur l'accessibilité
Prix
116,04 €

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