Low-Noise Low-Power Design for Phase-Locked Loops

Multi-Phase High-Performance Oscillators

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Éditeur :

Springer


Paru le : 2014-11-25



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Description

This book introduces low-noise and low-power design techniques for phase-locked loops and their building blocks. It summarizes the noise reduction techniques for fractional-N PLL design and introduces a novel capacitive-quadrature coupling technique for multi-phase signal generation.  The capacitive-coupling technique has been validated through silicon implementation and can provide low phase-noise and accurate I-Q phase matching, with low power consumption from a super low supply voltage.  Readers will be enabled to pick one of the most suitable QVCO circuit structures for their own designs, without additional effort to look for the optimal circuit structure and device parameters.  
Pages
96 pages
Collection
n.c
Parution
2014-11-25
Marque
Springer
EAN papier
9783319121994
EAN EPUB
9783319122007

Informations sur l'ebook
Nombre pages copiables
0
Nombre pages imprimables
9
Taille du fichier
3133 Ko
Prix
94,94 €

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